1. Field of the Invention
The present invention relates to a digital conversion method for an analog signal and, more particularly, to an improvement in conversion performances (stability, high-speed performance, and noise resistance) by converting a first output signal sin(.theta.-.phi.).multidot.f(t) into a digital signal by positive/negative sign determination performed by a comparator when sin(.theta.-.phi.) is calculated as an error deviation .epsilon. and a novel improvement for advantaging formation of a monolithic IC by reducing analog circuits in number.
2. Description of the Related Art
As a conventionally used digital conversion method for an analog signal of this type, for example, a tracking method shown in FIG. 1 is popularly used. More specifically, as shown in FIG. 1, reference numeral 1 denotes a resolver excited by an exciting signal (i.e., reference signal) E.multidot.sin .omega.t. Two-phase outputs KEsin .theta.sin .omega.t and KEcos .theta.sin .omega.t output from the resolver 1 are operated by an operation unit 2, and a two-phase output signal KEsinwtsin(.theta.-.phi.) (where .theta. is a resolver rotation angle, and .phi. is an output counter value) output from the operation unit 2 is synchronously rectified by a synchronous rectifier 3 to which the exciting signal E.multidot.sin .omega.t is input.
An output signal KEsin(.theta.-.phi.) obtained from the synchronous rectifier 3 is input to a counter 5 as a pulse output 4a through a voltage controlled oscillator 4, in order to obtain an output counter value .phi. serving as a digital angle output from the counter 5.
The output counter value .phi. is fed back, and thus a feed back loop is formed. Therefore, a velocity signal 6 is obtained by the output signal KEsin(.theta.-.phi.) from the synchronous rectifier 3, and a position signal 7 can be obtained from the output counter value .phi. of the counter 5.
The conventional digital conversion method for an analog signal has the configuration described above, the following problem is posed.
More specifically, since each constituent portion in the circuit configuration described above is partially constituted by a complex analog configuration, the entire configuration cannot be easily formed by an integrated monolithic semiconductor, and an exciting circuit or the like is inevitably added as a discrete part. For this reason, a low price, a reduction in size and weight, high reliability, and utility cannot be easily achieved. In addition, a preferable improvement means for a tracking speed is not found.